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What an accelerator needs from memory is bandwidth per unit of chip edge, and on that measure ordinary DRAM is an order of magnitude behind HBM.

Drawn from what Dylan Patel said

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What Dylan Patel actually said

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  1. Dylan Patel

    Founder and chief executive of SemiAnalysis

    and even if you take a generous interpretation of 128 * 8 gig transfers, you're at 128 gigabytes a second for the same shoreline versus 2 and a half terabytes a second. There's a there's an order of magnitude difference in bandwidth per edge area.

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    Watch from 1:22:09 plays here

    ↗Dylan Patel — The single biggest bottleneck to scaling AI computeyoutube.com

    video · 2h 30m · spoken · machine transcript

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Added to korrents 13 Mar 2026 · How quotes work · Something wrong? Tell us

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